<dec f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.h' l='133' type='struct radeon_ps'/>
<offset>4480</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1197' u='w' c='sumo_update_requested_ps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1199' u='m' c='sumo_update_requested_ps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1290' u='a' c='sumo_dpm_pre_set_power_state'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1299' u='a' c='sumo_dpm_set_power_state'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1335' u='a' c='sumo_dpm_post_set_power_state'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/radeon/sumo_dpm.c' l='1853' u='a' c='sumo_dpm_get_sclk'/>
