<def f='src/src/sys/dev/pci/pciide_sis_reg.h' l='92' ll='93' type='const u_int8_t [5]'/>
<use f='src/src/sys/dev/pci/siside.c' l='482' u='r' c='sis_setup_channel'/>
<use f='src/src/sys/dev/pci/siside.c' l='489' u='r' c='sis_setup_channel'/>
<doc f='src/src/sys/dev/pci/pciide_sis_reg.h' l='91'>/* PIO timings, for all up to 133NEW */</doc>
