<dec f='src/src/sys/dev/ic/siopvar_common.h' l='134' type='int'/>
<use f='src/src/sys/dev/ic/esiop.c' l='1545' u='r' c='esiop_scsipi_request'/>
<offset>3648</offset>
<doc f='src/src/sys/dev/ic/siopvar_common.h' l='134'>/* async. clock divider (scntl3) */</doc>
<use f='src/src/sys/dev/ic/siop.c' l='1287' u='r' c='siop_scsipi_request'/>
<use f='src/src/sys/dev/ic/siop_common.c' l='173' u='r' c='siop_common_reset'/>
<use f='src/src/sys/dev/pci/siop_pci_common.c' l='269' u='w' c='siop_pci_attach_common'/>
