/* * Interrupts * * Interrupts use a ring buffer on r6xx/r7xx hardware. It works pretty * the same as the CP ring buffer, but in reverse. Rather than the CPU * writing to the ring and the GPU consuming, the GPU writes to the ring * and host consumes. As the host irq handler processes interrupts, it * increments the rptr. When the rptr catches up with the wptr, all the * current interrupts have been processed. */