<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/vga.h' l='27' type='u8 nv_rdvgaowner(void * obj)'/>
<def f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_vga.c' l='179' ll='204' type='u8 nv_rdvgaowner(void * obj)'/>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_vga.c' l='161'>/* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied)
 * it affects only the 8 bit vga io regs, which we access using mmio at
 * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d*
 * in general, the set value of cr44 does not matter: reg access works as
 * expected and values can be set for the appropriate head by using a 0x2000
 * offset as required
 * however:
 * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and
 *    cr44 must be set to 0 or 3 for accessing values on the correct head
 *    through the common 0xc03c* addresses
 * b) in tied mode (4) head B is programmed to the values set on head A, and
 *    access using the head B addresses can have strange results, ergo we leave
 *    tied mode in init once we know to what cr44 should be restored on exit
 *
 * the owner parameter is slightly abused:
 * 0 and 1 are treated as head values and so the set value is (owner * 3)
 * other values are treated as literal values to set
 */</doc>
