<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nv50.h' l='132' type='u32'/>
<offset>1024</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='154' u='w' c='nv50_disp_dmac_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='157' u='w' c='nv50_disp_dmac_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='194' u='r' c='nv50_disp_dmac_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='454' u='r' c='nv50_disp_mast_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='90' u='r' c='nvd0_disp_dmac_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='315' u='r' c='nvd0_disp_mast_init'/>
