<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/disp.h' l='40' type='__uint32_t'/>
<offset>8224</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='593' u='w' c='nv_crtc_mode_set_regs'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='597' u='w' c='nv_crtc_mode_set_regs'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='599' u='w' c='nv_crtc_mode_set_regs'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='866' u='w' c='nv04_crtc_do_mode_set_base'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='868' u='w' c='nv04_crtc_do_mode_set_base'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_crtc.c' l='871' u='r' c='nv04_crtc_do_mode_set_base'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_hw.c' l='452' u='w' c='nv_save_state_ramdac'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/nouveau_dispnv04_hw.c' l='529' u='r' c='nv_load_state_ramdac'/>
