<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/class.h' l='189' type='u32'/>
<offset>0</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv04.c' l='134' u='r' c='nv04_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv10.c' l='76' u='r' c='nv10_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv17.c' l='81' u='r' c='nv17_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv40.c' l='199' u='r' c='nv40_fifo_chan_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='212' u='r' c='nv50_fifo_chan_ctor_dma'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='178' u='r' c='nv84_fifo_chan_ctor_dma'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/nouveau_chan.c' l='254' u='w' c='nouveau_channel_dma'/>
