<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/object.h' l='19' type='struct nouveau_object *'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/object.h' l='76' u='r' c='nv_pclass'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/device.h' l='106' u='r' c='nv_device'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/device.h' l='107' u='r' c='nv_device'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/client.h' l='30' u='r' c='nouveau_client'/>
<offset>64</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_engctx.c' l='152' u='r' c='nouveau_engctx_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_engctx.c' l='179' u='r' c='nouveau_engctx_fini'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_gpuobj.c' l='79' u='r' c='nouveau_gpuobj_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_handle.c' l='115' u='r' c='nouveau_handle_create'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_handle.c' l='144' u='r' c='nouveau_handle_create'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_handle.c' l='188' u='r' c='nouveau_handle_ref'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='77' u='a' c='nouveau_object_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='119' u='a' c='nouveau_object_destroy'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='344' u='r' c='nouveau_object_inc'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='345' u='r' c='nouveau_object_inc'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='379' u='r' c='nouveau_object_inc'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='380' u='r' c='nouveau_object_inc'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='404' u='r' c='nouveau_object_decf'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='405' u='r' c='nouveau_object_decf'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='435' u='r' c='nouveau_object_decs'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_object.c' l='436' u='r' c='nouveau_object_decs'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_printk.c' l='81' u='r' c='nv_printk_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/core/nouveau_core_printk.c' l='82' u='r' c='nv_printk_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='83' u='r' c='nv50_disp_chan_destroy'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='112' u='r' c='nv50_disp_dmac_object_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nv50.c' l='123' u='r' c='nv50_disp_dmac_object_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='59' u='r' c='nvd0_disp_dmac_object_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='69' u='r' c='nvd0_disp_dmac_object_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/disp/nouveau_engine_disp_nvd0.c' l='852' u='r' c='nvd0_disp_base_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nv04.c' l='58' u='r' c='nv04_dmaobj_bind'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nv50.c' l='51' u='r' c='nv50_dmaobj_bind'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nvc0.c' l='52' u='r' c='nvc0_dmaobj_bind'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/dmaobj/nouveau_engine_dmaobj_nvd0.c' l='51' u='r' c='nvd0_dmaobj_bind'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='228' u='r' c='nouveau_fifo_chid'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='229' u='r' c='nouveau_fifo_chid'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='230' u='r' c='nouveau_fifo_chid'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_base.c' l='232' u='r' c='nouveau_fifo_chid'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='83' u='r' c='nv50_fifo_context_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='115' u='r' c='nv50_fifo_context_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv50.c' l='315' u='r' c='nv50_fifo_chan_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='55' u='r' c='nv84_fifo_context_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='92' u='r' c='nv84_fifo_context_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nv84.c' l='291' u='r' c='nv84_fifo_chan_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c' l='152' u='r' c='nvc0_fifo_context_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c' l='190' u='r' c='nvc0_fifo_context_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c' l='284' u='r' c='nvc0_fifo_chan_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c' l='697' u='r' c='nvc0_fifo_intr_fault'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c' l='175' u='r' c='nve0_fifo_context_attach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c' l='217' u='r' c='nve0_fifo_context_detach'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c' l='322' u='r' c='nve0_fifo_chan_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c' l='814' u='r' c='nve0_fifo_intr_fault'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nv10.c' l='490' u='r' c='nv17_graph_mthd_lma_window'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/graph/nouveau_engine_graph_nv10.c' l='567' u='r' c='nv17_graph_mthd_lma_enable'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/nouveau_engine_falcon.c' l='179' u='r' c='_nouveau_falcon_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv04.c' l='53' u='r' c='nv04_software_set_ref'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv04.c' l='54' u='r' c='nv04_software_set_ref'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv04.c' l='63' u='r' c='nv04_software_flip'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv10.c' l='52' u='r' c='nv10_software_flip'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='52' u='r' c='nv50_software_mthd_dma_vblsem'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='53' u='r' c='nv50_software_mthd_dma_vblsem'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='74' u='r' c='nv50_software_mthd_vblsem_offset'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='83' u='r' c='nv50_software_mthd_vblsem_value'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='92' u='r' c='nv50_software_mthd_vblsem_release'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='105' u='r' c='nv50_software_mthd_flip'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nv50.c' l='197' u='r' c='nv50_software_context_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nvc0.c' l='50' u='r' c='nvc0_software_mthd_vblsem_offset'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/software/nouveau_engine_software_nvc0.c' l='66' u='r' c='nvc0_software_mthd_mp_control'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_base.c' l='150' u='r' c='nouveau_fb_create_'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnva3.c' l='332' u='r' c='nva3_ram_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnvc0.c' l='586' u='r' c='nvc0_ram_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnve0.c' l='1135' u='r' c='nve0_ram_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_anx9805.c' l='42' u='r' c='anx9805_train'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_anx9805.c' l='71' u='r' c='anx9805_aux'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/i2c/nouveau_subdev_i2c_anx9805.c' l='164' u='r' c='anx9805_xfer'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/ltcg/nouveau_subdev_ltcg_gf100.c' l='195' u='r' c='gf100_ltcg_dtor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/vm/nouveau_subdev_vm_nvc0.c' l='125' u='r' c='nvc0_vm_map'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/nouveau_chan.c' l='363' u='r' c='nouveau_channel_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/nouveau_drm.c' l='241' u='r' c='nouveau_accel_init'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/nouveau_drm.c' l='253' u='r' c='nouveau_accel_init'/>
