<dec f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/clock.h' l='106' type='int'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='107' u='r' c='nouveau_control_mthd_pstate_attr'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_ctrl.c' l='108' u='r' c='nouveau_control_mthd_pstate_attr'/>
<offset>128</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='251' u='r' c='nouveau_pstate_info'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c' l='252' u='r' c='nouveau_pstate_info'/>
