<def f='src/src/sys/dev/pci/mlyreg.h' l='1132' ll='1143'/>
<size>64</size>
<doc f='src/src/sys/dev/pci/mlyreg.h' l='1117'>/*
 * struct mly_cmd_address_physical {
 *	u_int8_t			lun;
 *	u_int8_t			target;
 *	u_int8_t			channel:3;
 *	u_int8_t			controller:5;
 * } __packed;
 *
 * struct mly_cmd_address_logical {
 *	u_int16_t			logdev;
 *	u_int8_t			res1:3;
 *	u_int8_t			controller:5;
 * } __packed;
 */</doc>
<mbr r='mly_cmd_generic::command_id' o='0' t='u_int16_t'/>
<mbr r='mly_cmd_generic::opcode' o='16' t='u_int8_t'/>
<mbr r='mly_cmd_generic::command_control' o='24' t='u_int8_t'/>
<mbr r='mly_cmd_generic::data_size' o='32' t='u_int32_t'/>
<mbr r='mly_cmd_generic::sense_buffer_address' o='64' t='u_int64_t'/>
<mbr r='mly_cmd_generic::addr' o='128' t='u_int8_t [3]'/>
<mbr r='mly_cmd_generic::timeout' o='152' t='u_int8_t'/>
<mbr r='mly_cmd_generic::maximum_sense_size' o='160' t='u_int8_t'/>
<mbr r='mly_cmd_generic::res1' o='168' t='u_int8_t [11]'/>
<mbr r='mly_cmd_generic::transfer' o='256' t='union mly_cmd_transfer'/>
