<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1067' type='u8'/>
<offset>312</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1067'>/* Maximum frequency, RP0 if not overclocking */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3425' u='w' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3429' u='r' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3489' u='w' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3755' u='w' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3756' u='r' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3758' u='r' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3759' u='r' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3773' u='r' c='valleyview_enable_rps'/>
