<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1064' type='u8'/>
<offset>288</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1054'>/* Frequencies are stored in potentially platform dependent multiples.
	 * In other words, *_freq needs to be multiplied by X to be interesting.
	 * Soft limits are those which are used for the dynamic reclocking done
	 * by the driver (raise frequencies under heavy loads, and lower for
	 * lighter loads). Hard limits are those imposed by the hardware.
	 *
	 * A distinction is made for overclocking, which is never enabled by
	 * default, and is considered to be above the hard limit if it&apos;s
	 * possible at all.
	 */</doc>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='1064'>/* Current frequency (cached, may not == HW) */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1142' u='r' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1151' u='r' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1161' u='r' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1163' u='r' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1173' u='r' c='gen6_pm_rps_work'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='2992' u='r' c='gen6_set_rps_thresholds'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='2997' u='r' c='gen6_set_rps_thresholds'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='2999' u='r' c='gen6_set_rps_thresholds'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3004' u='r' c='gen6_set_rps_thresholds'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3109' u='r' c='gen6_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3130' u='w' c='gen6_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3149' u='r' c='vlv_set_rps_idle'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3166' u='w' c='vlv_set_rps_idle'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3181' u='r' c='vlv_set_rps_idle'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3223' u='r' c='valleyview_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3224' u='r' c='valleyview_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3227' u='r' c='valleyview_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3232' u='w' c='valleyview_set_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3417' u='w' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3750' u='w' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3752' u='r' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3753' u='r' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='4220' u='r' c='__i915_gfx_val'/>
