<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_drv.h' l='308' type='_Bool'/>
<offset>3528</offset>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_ddi.c' l='719' u='r' c='intel_ddi_clock_get'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_ddi.c' l='1588' u='w' c='intel_ddi_get_config'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5277' u='r' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5358' u='r' c='i9xx_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6564' u='r' c='ironlake_compute_dpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6667' u='r' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='7168' u='r' c='haswell_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='9252' u='r' c='intel_dump_pipe_config'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='9669' u='r' c='intel_pipe_config_compare'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='9669' u='r' c='intel_pipe_config_compare'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='9669' u='r' c='intel_pipe_config_compare'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='9669' u='r' c='intel_pipe_config_compare'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_dp.c' l='817' u='w' c='intel_dp_compute_config'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_dp.c' l='1543' u='w' c='intel_dp_get_config'/>
