<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_drv.h' l='332' type='struct dpll'/>
<offset>3584</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_drv.h' l='330'>/* Settings for the intel dpll used on pretty much everything but
	 * haswell. */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5076' u='a' c='i9xx_update_pll_dividers'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5080' u='a' c='i9xx_update_pll_dividers'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5182' u='m' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5183' u='m' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5184' u='m' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5185' u='m' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5186' u='m' c='vlv_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5291' u='a' c='i9xx_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5369' u='a' c='i8xx_update_pll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5658' u='m' c='i9xx_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5659' u='m' c='i9xx_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5660' u='m' c='i9xx_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5661' u='m' c='i9xx_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='5662' u='m' c='i9xx_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6546' u='a' c='ironlake_compute_dpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6568' u='m' c='ironlake_compute_dpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6570' u='m' c='ironlake_compute_dpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6572' u='m' c='ironlake_compute_dpll'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6634' u='m' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6635' u='m' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6636' u='m' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6637' u='m' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6638' u='m' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='6643' u='a' c='ironlake_crtc_mode_set'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_dp.c' l='785' u='w' c='intel_dp_set_clock'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_sdvo.c' l='1099' u='a' c='i9xx_adjust_sdvo_tv_clock'/>
