<def f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bus/hwsq.h' l='19' ll='28' type='struct hwsq_reg hwsq_reg2(u32 addr1, u32 addr2)'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bus/hwsq.h' l='33' u='c' c='hwsq_reg'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv50.c' l='455' u='c' c='nv50_ram_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv50.c' l='456' u='c' c='nv50_ram_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv50.c' l='457' u='c' c='nv50_ram_ctor'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_ramnv50.c' l='458' u='c' c='nv50_ram_ctor'/>
