<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='2826' type='void gen6_gt_force_wake_get(struct drm_i915_private * dev_priv, int fw_engine)'/>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_drv.h' l='2822'>/* On SNB platform, before reading ring registers forcewake bit
 * must be set to prevent GT core from power down and stale values being
 * returned.
 */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='213' u='c' c='sandybridge_blit_fbc_update'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3325' u='c' c='gen8_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3411' u='c' c='gen6_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c' l='3707' u='c' c='valleyview_enable_rps'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c' l='472' u='c' c='init_ring_common'/>
<def f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_uncore.c' l='450' ll='467' type='void gen6_gt_force_wake_get(struct drm_i915_private * dev_priv, int fw_engine)'/>
<doc f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_uncore.c' l='444'>/*
 * Generally this is called implicitly by the register read function. However,
 * if some sequence requires the GT to not power down then this function should
 * be called at the beginning of the sequence followed by a call to
 * gen6_gt_force_wake_put() at the end of the sequence.
 */</doc>
