<dec f='src/src/sys/external/bsd/drm2/dist/uapi/drm/i915_drm.h' l='846' type='__u32'/>
<offset>32</offset>
<doc f='src/src/sys/external/bsd/drm2/dist/uapi/drm/i915_drm.h' l='834'>/**
	 * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
	 * I915_TILING_Y).
	 *
	 * This value is to be set on request, and will be updated by the
	 * kernel on successful return with the actual chosen tiling layout.
	 *
	 * The tiling mode may be demoted to I915_TILING_NONE when the system
	 * has bit 6 swizzling that can&apos;t be managed correctly by GEM.
	 *
	 * Buffer contents become undefined when changing tiling_mode.
	 */</doc>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='308' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='318' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='322' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='341' u='w' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='348' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='367' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='373' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='384' u='r' c='i915_gem_set_tiling'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_gem_tiling.c' l='393' u='w' c='i915_gem_set_tiling'/>
