<def f='src/src/sys/external/bsd/drm2/dist/drm/radeon/radeon.h' l='2095' ll='2124'/>
<size>288</size>
<mbr r='cik_asic::max_shader_engines' o='0' t='unsigned int'/>
<mbr r='cik_asic::max_tile_pipes' o='32' t='unsigned int'/>
<mbr r='cik_asic::max_cu_per_sh' o='64' t='unsigned int'/>
<mbr r='cik_asic::max_sh_per_se' o='96' t='unsigned int'/>
<mbr r='cik_asic::max_backends_per_se' o='128' t='unsigned int'/>
<mbr r='cik_asic::max_texture_channel_caches' o='160' t='unsigned int'/>
<mbr r='cik_asic::max_gprs' o='192' t='unsigned int'/>
<mbr r='cik_asic::max_gs_threads' o='224' t='unsigned int'/>
<mbr r='cik_asic::max_hw_contexts' o='256' t='unsigned int'/>
<mbr r='cik_asic::sc_prim_fifo_size_frontend' o='288' t='unsigned int'/>
<mbr r='cik_asic::sc_prim_fifo_size_backend' o='320' t='unsigned int'/>
<mbr r='cik_asic::sc_hiz_tile_fifo_size' o='352' t='unsigned int'/>
<mbr r='cik_asic::sc_earlyz_tile_fifo_size' o='384' t='unsigned int'/>
<mbr r='cik_asic::num_tile_pipes' o='416' t='unsigned int'/>
<mbr r='cik_asic::backend_enable_mask' o='448' t='unsigned int'/>
<mbr r='cik_asic::backend_disable_mask_per_asic' o='480' t='unsigned int'/>
<mbr r='cik_asic::backend_map' o='512' t='unsigned int'/>
<mbr r='cik_asic::num_texture_channel_caches' o='544' t='unsigned int'/>
<mbr r='cik_asic::mem_max_burst_length_bytes' o='576' t='unsigned int'/>
<mbr r='cik_asic::mem_row_size_in_kb' o='608' t='unsigned int'/>
<mbr r='cik_asic::shader_engine_tile_size' o='640' t='unsigned int'/>
<mbr r='cik_asic::num_gpus' o='672' t='unsigned int'/>
<mbr r='cik_asic::multi_gpu_tile_size' o='704' t='unsigned int'/>
<mbr r='cik_asic::tile_config' o='736' t='unsigned int'/>
<mbr r='cik_asic::tile_mode_array' o='768' t='__uint32_t [32]'/>
<mbr r='cik_asic::macrotile_mode_array' o='1792' t='__uint32_t [16]'/>
