<dec f='src/src/sys/dev/ata/atavar.h' l='47' type='struct ata_channel *'/>
<offset>64</offset>
<doc f='src/src/sys/dev/ata/atavar.h' l='46'>/* Channel and drive that are to process the request. */</doc>
<use f='src/src/sys/dev/ata/ata.c' l='473' u='r' c='atabus_thread'/>
<use f='src/src/sys/dev/ata/ata.c' l='907' u='w' c='ata_exec_xfer'/>
<use f='src/src/sys/dev/ata/ata.c' l='962' u='r' c='atastart'/>
<use f='src/src/sys/dev/ata/ata.c' l='1070' u='r' c='ata_kill_pending'/>
<use f='src/src/sys/dev/ata/ata.c' l='1077' u='r' c='ata_kill_pending'/>
<use f='src/src/sys/dev/ic/mvsata.c' l='2675' u='r' c='mvsata_edma_timeout'/>
<use f='src/src/sys/dev/ic/wdc.c' l='879' u='r' c='wdcintr'/>
<use f='src/src/sys/dev/ic/wdc.c' l='880' u='r' c='wdcintr'/>
<use f='src/src/sys/dev/ic/wdc.c' l='937' u='r' c='wdc_reset_channel'/>
<use f='src/src/sys/dev/ic/wdc.c' l='974' u='r' c='wdc_reset_channel'/>
<use f='src/src/sys/dev/ic/wdc.c' l='982' u='r' c='wdc_reset_channel'/>
<use f='src/src/sys/dev/ic/wdc.c' l='983' u='r' c='wdc_reset_channel'/>
<use f='src/src/sys/dev/scsipi/atapi_wdc.c' l='992' u='r' c='wdc_atapi_phase_complete'/>
