<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211.h' l='154' type='HAL_BOOL ar5211PhyDisable(struct ath_hal * )'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_attach.c' l='49' u='r'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_attach.c' l='49' u='r'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_attach.c' l='49' u='r'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_attach.c' l='49' u='r'/>
<def f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_reset.c' l='568' ll='572' type='HAL_BOOL ar5211PhyDisable(struct ath_hal * ah)'/>
<doc f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_reset.c' l='562'>/*
 * Places the PHY and Radio chips into reset.  A full reset
 * must be called to leave this state.  The PCI/MAC/PCU are
 * not placed into reset as we must receive interrupt to
 * re-enable the hardware.
 */</doc>
