<dec f='src/src/sys/dev/ic/aic7xxxvar.h' l='1084' type='struct ahc_tmode_tstate *[16]'/>
<use f='src/src/sys/dev/ic/aic7xxx_inline.h' l='303' u='r' c='ahc_fetch_transinfo'/>
<offset>8960</offset>
<doc f='src/src/sys/dev/ic/aic7xxxvar.h' l='1078'>/*
	 * Target mode related state kept on a per enabled lun basis.
	 * Targets that are not enabled will have null entries.
	 * As an initiator, we keep one target entry for our initiator
	 * ID to store our sync/wide transfer settings.
	 */</doc>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='1567' u='r' c='ahc_alloc_tstate'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='1570' u='r' c='ahc_alloc_tstate'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='1572' u='r' c='ahc_alloc_tstate'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='1573' u='r' c='ahc_alloc_tstate'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='1598' u='w' c='ahc_alloc_tstate'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='3940' u='r' c='ahc_free'/>
<use f='src/src/sys/dev/ic/aic7xxx.c' l='6056' u='r' c='ahc_reset_channel'/>
