<dec f='src/src/sys/dev/pci/pciide_piix_reg.h' l='73'/>
<use f='src/src/sys/dev/pci/piixide.c' l='496' u='c'/>
<use f='src/src/sys/dev/pci/piixide.c' l='560' u='c'/>
<use f='src/src/sys/dev/pci/piixide.c' l='706' u='c'/>
<use f='src/src/sys/dev/pci/piixide.c' l='828' u='c'/>
<doc f='src/src/sys/dev/pci/pciide_piix_reg.h' l='69'>/*
 * Slave IDE timing register (PIIX3/4 only)
 * This register must be enabled via the PIIX_IDETIM_SITRE bit
 */</doc>
