<dec f='src/src/sys/dev/ic/athnreg.h' l='35'/>
<use f='src/src/sys/dev/ic/athn.c' l='1691' u='c'/>
<use f='src/src/sys/dev/ic/athn.c' l='1700' u='c'/>
<use f='src/src/sys/dev/ic/athn.c' l='1731' u='c'/>
<use f='src/src/sys/dev/ic/athn.c' l='1740' u='c'/>
<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5210/ar5210reg.h' l='44'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5210/ar5210_reset.c' l='170' u='c'/>
<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211reg.h' l='38'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_xmit.c' l='48' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5211/ar5211_xmit.c' l='67' u='c'/>
<dec f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212reg.h' l='33'/>
<doc f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212reg.h' l='32'>/* 0x2c is RTSD1 on the 5211 */</doc>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_xmit.c' l='59' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5212/ar5212_xmit.c' l='69' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5416/ar5416_beacon.c' l='91' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5416/ar5416_reset.c' l='495' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5416/ar5416_reset.c' l='496' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5416/ar5416_reset.c' l='507' u='c'/>
<use f='src/src/sys/external/isc/atheros_hal/dist/ar5416/ar5416_reset.c' l='508' u='c'/>
