<dec f='src/src/sys/dev/pci/pciide_apollo_reg.h' l='125'/>
<use f='src/src/sys/dev/pci/viaide.c' l='422' u='c'/>
<use f='src/src/sys/dev/pci/viaide.c' l='437' u='c'/>
<use f='src/src/sys/dev/pci/viaide.c' l='629' u='c'/>
<use f='src/src/sys/dev/pci/viaide.c' l='736' u='c'/>
<use f='src/src/sys/dev/pci/viaide.c' l='858' u='c'/>
<use f='src/src/sys/dev/pci/viaide.c' l='861' u='c'/>
<doc f='src/src/sys/dev/pci/pciide_apollo_reg.h' l='124'>/* data port timings controls */</doc>
